Какие-то студенты растворяют наши чипы в серной кислоте
panchul — 01.08.2014 Сегодня набрел на удивительный пост о том, как некто Эндрю Зоненберг растворил сначала в серной, а потом в плавиковой кислоте микроконтроллер PIC32MZ - чип, в создании которого я принимал небольшое участие. Причем этот Эндрю тыцнул о своем деянии пост на сайте "Обнаженный Силикон" (Silicon Exposed).Microchip PIC32MZ - это новый передовой микроконтроллер от Microchip Technologies на основе процессорного ядра MIPS microAptive UP от Imagination Technologies.
PIC32MZ уверенно побивает STM32 F4 - см. независимый отчет
MIPS MCUs Outrun ARM — Report of Feb 17, 2014
http://www.linleygroup.com/search.php c PIC32MZ
Microchip's new PIC32MZ family offers MIPS-based MCUs with outstanding performance, plenty of flash memory and SRAM, crypto acceleration, Ethernet, and other high-speed peripherals.
Моя часть в проекте PICM32MZ - Verification IP, которое использовали инженеры Microchip Technologies в Аризоне для интеграции нашего процессорного ядра с их периферийными устройствами и контроллером памяти.
Итого, Andrew Zonenberg. Вот его фото:
Вот одна из его фотографий чипов (правда не PIC32MZ, а чипа из предыдущей линейки PIC32MX):
Этот варвар еще и где-то имеет доступ к электронному микроскопу:
Monday, March 24, 2014
Microchip PIC32MZ process vs PIC32MX
Although they're sold under the PIC brand name they have very little in common with the 8/16 bit PIC MCUs. They're fully pipelined processors with quite a bit of horsepower.
The PIC32MX family was the first to be introduced, back in 2009 or so. They're a MIPS M4K core (for the 64/100 pin parts) or M14K (for the 28/44 pin parts) at up to 80 MHz and max out at 128 KB of SRAM and 512 KB of NOR flash plus a fairly standard set of peripherals.
PIC32MX microcontroller |
Somewhat disappointingly, the PIC32MX MMU is fixed mapping and there is no external bus interface. Although there is support for user/kernel privilege separation, all userspace code shares one address space. Another minor annoyance is that all PIC32MX parts run from a fixed 1.8V on-die LDO which normally cannot (the 300 series is an exception) be disabled or bypassed to run from an external supply.
The PIC32MZ series is just coming out now. They're so new, in fact that they show as "future product" on Microchip's websiteand you can only buy them on dev boards, although I'm told by around Q3-Q4 of this year they'll be reaching distributors. They fix a lot of the complaints I have with PIC32MX and add a hefty dose of speed: 200 MHz max CPU clock and an on-die L1 cache.
PIC32MZ microcontroller |
On-chip memory in the PIC32MZ is increased to up to 512 KB of SRAM and a whopping 2 MB of flash in the largest part. The new CPU core has a fully programmable MMU and support for an external bus interface capable of addressing up to 16MB of off-chip address space.
I'm a hacker at heart, not just a developer, so I knew the minute I got one of these things I'd have to tear it down and see what made it tick. I looked around for a bit, found a $25 processor module on Digikey, and picked it up.
The board was pretty spartan, which was fine by me as I only wanted the chip.
PIC32MZ processor module |
Without further ado, here's the top metal shots:
PIC32MX340F512H |
PIC32MZ2048ECH |
From an initial impression, we can see that although both run at the same core voltage (1.8V) the MZ is definitely a new, significantly smaller fab process. While the top layer of the MX is fine-pitch signal routing, the top layer of the MZ is (except in a few blocks which appear to contain analog circuitry) completely filled with power distribution routing.
Top layer closeups of MZ (left), MX (right), same scale |
Thick power distribution wiring on the top layer is a hallmark of deep-submicron processes, 130 nm and below. Most 180 nm or larger devices have at least some signal routing on the top layer.
Looking at the mask revision markings gives a good hint as to the layer count and stack-up.
Mask rev markings on MZ (left), MX (right), same scale |
Enough with the top layer... time to get down! Both samples were etched with HF until all metal and poly was removed.
The first area of interest was the flash.
NOR flash on MZ (left), MX (right), different scales |
The white cylinders littering the MX die are via plugs, most likely tungsten, left over after the HF etch. The MZ appears to use a copper damascene process without via plugs, although since no cross section was performed details of layer thicknesses etc are unavailable.
The next target was the SRAM.
6T SRAM on MZ (left), MX (right), different scales |
Cell pitch for the MZ is 1345 x 747 nm (1.00 μm2/bit) while the MX is 1895 x 2550 nm (4.83 μm2/bit). This is a 4.83x increase in density.
The last area of interest was the standard cell array for the CPU.
Closeup of standard cells on MZ (left), MX (right), different scales |
Both devices also had a significant number of dummy cells in the gate array, suggesting that the designs were routing-constrained.
Dummy cells in MZ |
Dummy cells in MX |
In conclusion, the PIC32MZ is a significantly more powerful 130 nm upgrade to the slower 250 nm PIC32MX family. If Microchip fixes most of the silicon bugs before they launch I'll definitely pick up a few and build some stuff with them.
I wasn't able to positively identify the fab either device was made on however the fill patterns and power distribution structure on the MZ are very similar of the TI AM1707 which is fabricated by TSMC so they're my first guess.
For more info and die pics check out the SiliconPr0n pages for the two chips:
UPD: Тех, кто вздумает меня учить, что "Silicon Exposed" переводится не "Обнаженный Силикон", а "Обнаженный Кремний" - буду банить.
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